1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device and a data storage system, and more particularly, it relates to a structure using electrically writable/erasable nonvolatile semiconductor memory cells.
2. Description of the Background Art
An electrically writable/erasable nonvolatile semiconductor memory (flash memory) has come into wide use as a memory for storing program codes substituting for an EPROM (Erasable Programmable Read Only Memory) or a masked ROM (Read Only Memory) with such an advantage that the same enables rewriting on a substrate.
In recent years, a mass storage flash memory capable of storing image data and sound data is developed following refinement in the semiconductor working technique, with rapid progress of application to a digital still camera or a portable audio apparatus.
In order to enable recording of motion picture data, the capacity of the flash memory must be further increased.
In addition to refinement in the semiconductor working technique, a multivalued technique can be mentioned as an important technique for implementing a larger capacity of the flash memory. The flash memory generally applies a high electric field to a floating gate isolated from the periphery by an isolation film for injecting or emitting electric charge thereby changing the threshold of a memory cell and storing data.
A general flash memory (binary flash memory) associates a high-threshold state of a memory cell with xe2x80x9c1xe2x80x9d (or xe2x80x9c0xe2x80x9d) and a low-threshold state the memory cell with xe2x80x9c0xe2x80x9d (or xe2x80x9c1xe2x80x9d). Thus, a single memory cell can store one-bit data (binary data).
A flash memory (multivalued flash memory) employing the multivalued technique sets the threshold of a memory cell in at least three states. For example, a flash memory capable of storing four values sets the threshold of a memory cell in four states successively in association with xe2x80x9c11xe2x80x9d (the lowest threshold state), xe2x80x9c10xe2x80x9d, xe2x80x9c00xe2x80x9d and xe2x80x9c01xe2x80x9d (the highest threshold state). Thus, a single memory cell can store two-bit data (multivalued data). Association between the -physical state of the memory cell and logical data can be arbitrarily set similarly to the case of the binary flash memory, as a matter of course.
When storing xe2x80x9c1xe2x80x9d (or xe2x80x9c0xe2x80x9d) in a memory cell, leaving the memory cell intact for a long time and thereafter reading the data in implementation of such a multivalued flash memory, the data disadvantageously becomes xe2x80x9c0xe2x80x9d (or xe2x80x9c1xe2x80x9d).
This problem is physically caused since electrons mainly injected into a floating gate pass through an energy barrier of an insulating film to be emitted to a semiconductor substrate or a gate or electrons are injected from the semiconductor substrate or the gate to change the threshold of the memory cell.
Referring to FIG. 44, the binary flash memory sets the threshold in the state xe2x80x9c1xe2x80x9d to 1 V to 1.7 V, the threshold in the state xe2x80x9c0xe2x80x9d to at least 4.3 V and a determination threshold in reading to 3 V, for example. In this case, each of the states xe2x80x9c1xe2x80x9d and xe2x80x9c0xe2x80x9d has a read margin of 1.3 V. In this case, false reading is caused when electrons corresponding to 1.3 V are injected/emitted.
On the other hand, the multivalued flash memory, sets the threshold in the state xe2x80x9c11xe2x80x9d to 1 V to 1.7 V, the threshold in the state xe2x80x9c10xe2x80x9d to 2.3 V to 2.7 V, the threshold in the state xe2x80x9c00xe2x80x9d to 3.3 V to 3.7 V and the threshold in the state xe2x80x9c01xe2x80x9d to at least 4.3 V, for example. When setting determination thresholds in reading to 2 V, 3 V and 4 V, each state has a read margin of only 0.3 V. Therefore, it follows that false reading is caused when electrons corresponding to 0.3 V are injected/emitted.
When a memory cell having a Vgs-Ids (Vgs: gate-source voltage, Ids: drain-source current) characteristic denoted by symbol F1 in FIG. 44 reaches the same state as a memory cell having a Vgs-Ids characteristic denoted by symbol F2 due to emission of electrons from a floating gate, written data xe2x80x9c01xe2x80x9d is falsely read as xe2x80x9c00xe2x80x9d in the multivalued flash memory.
Similarly, when a memory cell having a Vgs-Ids characteristic denoted by symbol F3 reaches the same state as a memory cell having a Vgs-Ids characteristic denoted by symbol F4, written data xe2x80x9c11xe2x80x9d is falsely read as xe2x80x9c10xe2x80x9d in the multivalued flash memory.
In the binary flash memory, data is correctly read whether a memory cell having the characteristic F1 reaches the state of a memory cell having the characteristic F2 or a memory cell having the characteristic F3 reaches the state of a memory cell having the characteristic F4.
Thus, the binary flash memory is superior in data reliability to the multivalued flash memory although the binary flash memory and the multivalued flash memory are physically equivalent in data holdability to each other. Further, the binary flash memory is superior in consideration of the data transfer rate. In consideration of the cost and the storage capacity, however, the multivalued flash memory is superior as described above. For future benefit, therefore, development of a device effectively implementing all these characteristics is demanded.
Accordingly, an object of the present invention is to provide a nonvolatile semiconductor memory device and a data storage system implementing a large storage capacity, improving reliability of data and enabling a high-speed operation.
A nonvolatile semiconductor memory device according to an aspect of the present invention includes a nonvolatile memory cell array including a plurality of memory cells and a control circuit for controlling a write operation, a read operation and an erase operation for the plurality of memory cells, and the control circuit writes binary data or multivalued data in a memory cell subjected to writing in response to a write request and reads the binary data or the multivalued data in response to the contents written in a memory cell subjected to reading in the read operation.
Preferably, the control circuit sets the memory cell subjected to writing in either a first state for erasing or an n-th state different from the first state when writing the binary data while setting the memory cell in any of n (at least three) different states in total ranging from the first state to the n-th state when writing the multivalued data. Further, the control circuit determines to which one of states ranging from the first state to a k-th state, where n is greater than k, or ranging from a (k+1)-th state to the n-th state the memory cell storing the binary data belongs while determining to which one of the n states in total the memory cell storing the multivalued data belongs in the read operation.
In particular, the control circuit determines to which one of the n states in total the memory cell storing the binary data belongs in the read operation and outputs a warning signal indicating change of the binary data when determining that the memory cell belongs to a state different from the first state or the n-th state. Alternatively, the control circuit determines to which one of the n states in total the memory cell storing the binary data belongs in the read operation and performs a write operation for rewriting the binary data in the memory cell when determining that the memory cell belongs to a state different from the first state or the n-th state.
According to the aforementioned nonvolatile semiconductor memory device, the binary data or the multivalued data of at least three values can be written or read in response to a request. Thus, data can be written and read at a high speed with high reliability at need while storing data of a large volume.
According to the aforementioned nonvolatile semiconductor memory device, further, displacement of the threshold can be detected with respect to the memory cell storing the binary data.
According to the aforementioned nonvolatile semiconductor memory device, the binary data can be rewritten (repaired) in the memory cell storing the binary data when detecting displacement of the threshold.
Preferably, the plurality of memory cells are divided into a plurality of write/read units collectively subjected to the write operation and the read operation, the nonvolatile semiconductor memory device further comprises a plurality of flags arranged for the plurality of write/read units respectively, and each of the plurality of flags stores a value indicating whether the binary data is written or the multivalued data is written in the memory cell of the corresponding write/read unit.
In particular, the control circuit writes the binary data or the multivalued data in the write/read unit subjected to writing while writing a value indicating whether the binary data is written or the multivalued data is written in the corresponding flag in the write operation.
In particular, the control circuit executes a first write sequence for writing the binary data or a second write sequence for writing the multivalued data for the write/read unit subjected to writing in response to the externally received write request. The control circuit executes a first read sequence for reading the binary data when the binary data is written in the write/read unit subjected to reading while executing a second read sequence for reading the multivalued data when the multivalued data is written in the write/read unit subjected to reading on the basis of the value of the corresponding flag subjected to reading in the read operation.
According to the aforementioned nonvolatile semiconductor memory device, the flag is arranged for each write/read unit (sector or page). Thus, the value indicating whether the binary data is written or the multivalued data is written can be stored in the flag.
According to the aforementioned nonvolatile semiconductor memory device, the flag is identical in structure to the memory cell, whereby writing/reading in/from the flag can be readily performed simultaneously with writing/reading in/from the memory cell.
According to the aforementioned nonvolatile semiconductor memory device, the flag can store whether the binary data is written or the multivalued data is written in the memory cell simultaneously with writing in the memory cell.
According to the aforementioned semiconductor memory device, the write sequence for the binary data can be executed when a write request for the binary data is externally received while the write sequence for the multivalued data can be executed when a write request for the multivalued data is externally received.
According to the aforementioned nonvolatile semiconductor memory device, the binary data or the multivalued data can be read from each write/read unit on the basis of the flag.
Preferably, each of the plurality of memory cells has different n states in total, where n is at least three, including a first state for erasing and a second state closest to the first state, and the control circuit sets the memory cell subjected to writing in the first state or in the second state when writing the binary data and determines whether the memory cell subjected to reading belongs to the first state or any of the n states in total excluding the first state when reading the binary data.
The aforementioned nonvolatile semiconductor memory device controls the memory cell subjected to writing to enter the first state or the second state in response to the write request and determines whether the memory cell subjected to reading is in the first state or in another state in the read operation. Thus, the binary data can be written/read.
A data storage system according to another aspect of the present invention includes memory area including a first nonvolatile semiconductor memory having a first characteristic and a second nonvolatile semiconductor memory having a second characteristic different from the first characteristic and a control unit transmitting/receiving data to/from an external device for writing data in the memory area and reading data from the memory area, while the control unit determines whether writing matching with the first characteristic is required or writing matching with the second characteristic is required in response to storage data received from the external device to be written in the memory area and writes the storage data in the first nonvolatile semiconductor memory or the second nonvolatile semiconductor memory in response to the determination.
Preferably, the first characteristic is a characteristic capable of storing data with prescribed reliability and operating at a prescribed processing speed, and the second characteristic is a characteristic capable of storing data with relatively higher reliability than the first characteristic and operating at a higher speed than the first characteristic.
The aforementioned data storage system comprises at least two nonvolatile semiconductor memories having different characteristics and can store data in the nonvolatile semiconductor memory having a corresponding characteristic in response to the storage data. In particular, highly reliable data processing can be executed at a high speed with a large capacity by employing the first nonvolatile semiconductor memory capable of storing data with the prescribed reliability and operating at the prescribed processing speed and the second nonvolatile semiconductor memory device capable of storing data with the relatively higher reliability than the first nonvolatile semiconductor memory and operating at the higher speed than the first characteristic.
Preferably, the first nonvolatile semiconductor memory includes a plurality of multivalued data memory cells each storing data of at least two bits, and the second nonvolatile semiconductor memory includes a plurality of memory cells each storing data of one bit.
Preferably, the control unit writes the storage data in the second nonvolatile semiconductor memory when determining that the external device requires an operation of writing data requiring relatively high reliability or transmitting/receiving data at a high speed while otherwise writing the storage data in the first nonvolatile semiconductor memory in response to the storage data.
Preferably, the control unit writes the storage data in the second nonvolatile semiconductor memory when the first nonvolatile semiconductor memory is in operation while writing the storage data in the first nonvolatile semiconductor memory when the first nonvolatile semiconductor memory is not in operation.
Preferably, the control unit transfers data already written in the second nonvolatile semiconductor memory to the first nonvolatile semiconductor memory in response to absence of data transmission/receiving to/from the external device.
Preferably, the control unit writes management data for managing the memory area in the second nonvolatile semiconductor memory.
According to the aforementioned data storage system, the second nonvolatile semiconductor memory storing the binary data and the first nonvolatile semiconductor memory storing the multivalued data can be employed.
According to the aforementioned data storage system, the data can be written in the nonvolatile semiconductor memory corresponding to the binary data when determining that the external device requires the operation of writing data requiring relatively high reliability or transmitting/receiving data at a high speed.
According to the aforementioned data storage system, the storage data can be written in the second nonvolatile semiconductor memory when the first nonvolatile semiconductor memory is in operation or the storage data can be written in the first nonvolatile semiconductor memory when the first nonvolatile semiconductor memory is not in operation.
According to the aforementioned data storage system, the binary data written in the nonvolatile semiconductor memory corresponding to the binary data can be stored in the nonvolatile semiconductor memory corresponding to the multivalued data in response to absence of data a transmission/receiving to/from the external device.
According to the aforementioned data storage system, the management data for managing the memory area is stored as binary data in the nonvolatile semiconductor memory corresponding to the binary data. Thus, the probability of false reading related to the management data is reduced, thereby reducing a possibility of causing a critical error in the system.
A data storage system according to still another aspect of the present invention includes a nonvolatile memory area including a plurality of memory cells each of which is capable of storing data in a binary state or a multivalued state of at least three values and reading the stored data of the binary state or the multivalued state and a control unit transmitting/receiving data to/from an external device for writing data in the nonvolatile memory area and reading data from the nonvolatile memory area, and the control unit writes storage data in the nonvolatile memory area in the binary state when determining that the external device requires an operation of writing data requiring relatively high reliability or transmitting/receiving data at a high speed in response to the storage data.
In particular, the control unit writes management data for managing the nonvolatile memory area in the nonvolatile memory area in the binary state.
The aforementioned data storage system includes the plurality of memory cells capable of storing data in the binary state or in the multivalued state, and can store data in the binary state or in the multivalued state in response to data received from the external device. Thus, highly reliable data processing can be executed at a high speed in a large capacity.
The aforementioned data storage system stores the management data for managing the memory area in the binary state. Thus, the probability of false reading related to the management data is reduced for reducing the possibility of causing a critical error in the system.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.